Faster Execution Speed
uMFPU V3 is 10 to 20 times faster than uMFPU V2 for all basic floating point operations and up to 70 times faster on some advanced instructions.
The number of general purpose registers has been extended to 128 and the number of temporary registers has been extended to 8. There are also 256 EEPROM registers that can be used for non-volatile storage.
256 Byte Instruction Buffer
The instruction buffer has been extended to 256 bytes for improved throughput and easier interfacing. The Busy/Ready status only needs to be checked every 256 bytes, or when data needs to be read from the uM-FPU. This allows efficient use of built-in high level support routines in many compilers.
Expanded Instruction Set
A comprehensive set of instructions in provided for performing 32-bit floating point and integer calculations, and exchanging data with the microcontroller. All instructions use an 8-bit opcode, eliminating the XOP prefix used by uM-FPU V2.
A matrix can be defined as any set of sequential registers. The MOP instruction provides scalar operations, element-wise operations, matrix multiply, count, sum, average, min, max, copy and set operations.
Instructions are provided to support multiply and accumulate and multiply and subtract operations.
Table Lookup Instructions
Instructions are provided to load 32-bit values from a table or find the index of a floating point or long integer table entry that matches a specified condition.
String instructions are provided to insert and append substrings, search for fields and substrings, convert from floating point or long integer to a substring, or convert from a substring to floating point or long integer. For example, the string instructions could be used to parse a GPS NMEA sentence, or format multiple numbers in an output string.
User-defined functions can be stored in Flash and EEPROM. The Flash functions are programmed through the TSIN/TSTOUT pins using the uMFPU V3 IDE. The EEPROM functions can be programmed at run-time. Conditional execution is
supported using conditional branch and jump
Two 12-bit A/D channels are provided. The A/D conversion can be triggered manually, through an external input, or from a built-in timer. The A/D values can be read as raw values or automatically scaled to a floating point value. It supported up to 10,000 samples per second.
Timers can be used to trigger the A/D conversion, or to track elapsed time. A microsecond and second timer are provided.
An external input can be used to trigger an A/D conversion, or to count external events.
Improved SPI Support
The SPI maximum SCLK frequency has been increased to 15 MHz, and the minimum data period has been reduced to 1.6 microseconds.
The uMFPU V3 chip can be connected using either an I2C interface or SPI interface. The I2C interface is 100 kHz and 400 kHz compatible.
Low Power Modes
When the uMFPU V3 chip is not busy it automatically enters a power saving mode. It can also be configured to enter a sleep mode which turns the device off while preserving register contents. In sleep mode the uMFPU V3 chip consumes negligible power.
Flexible Supply Voltage
The uMFPU V3 chip can be operated from a 2.7V, 3.3V, or 5V supply.
The uM-FPU V3 is available in 18-pin DIP, SOIC-18 and QFN-44 packages.